Lecture 05
BJTs Circuits

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topics
• Large-signal operation
• BJT circuits at DC
• BJT biasing schemes

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Large-signal Ỉ Bias (DC) + signal (AC)

Bias + signal

vo = Vcc − iC Rc = Vcc − Rc I S e

vBE

VT

vBE = VBE + vi
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DC load line : VBB = I B × RB + VBE

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VCC = I C × RC + VCE

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head room (small)
Leg room (small)

VCC = I C × RCA + VCE → QA
VCC = I C × RCB + VCE → QB
RCB > RCA
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BJT operate as a switch
Switch off:

vI < 0.5V →i B = 0 →i C = 0 →v C = VCC
Switch on:

vC = 0.2V ≈ 0V

Switch on Ỉ saturation mode
Switch off Æ cut-off mode

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Example 5.3

BJT work in saturation mode
VC = VCE ( sat ) = 0.2V

50 < β

10 − 0.2
I C ( sat ) =
= 9.8mA
1k
I C ( sat ) 9.8m
I B (max) =
=
= 0.196mA
50
β min
< 150
I C ( sat ) 9.8m
I B (min) =
=
= 0.0653mA
150
β max
I B = I B (max) × overdrive


RB =

factor

5 − 0.7 4.3
=
= 2.2k
IB
1.96

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Example 5.4 (DC analysis)
Reverse bias

β = 100

forward bias

Assume BJT in active mode :

VE = 4 − 0.7V = 3.3V
IE =


VE
3.3
=
= 1mA
RE 3.3k

100
×1mA = 0.99mA
I C = αI E =
100 + 1
I B = I E − I C= 0.01mA
Active mode check
VC = 10 − I C × 4.7 k = 5.3V
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Example 5.5 (DC analysis)
Assume BJT in active mode :

VE = 6 − 0.7V = 5.3V
β = 100

VE
5 .3
IE =

=
= 1.6mA
RE 3.3k
100
×1.6mA = 1.584mA
I C = αI E =
100 + 1
I B = I E − I C= 0.016mA
VC = 10 − I C × 4.7 k = 2.48V
JC : forward bias Not in active mode
JE : forward bias

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Assume BJT in saturation mode :

VE = 6 − 0.7V = 5.3V
VC = VE + VCE ( sat ) = 5.3 + 0.2 = 5.5V
IE =

5 .3
VE
=
= 1.6mA

I E 3.3m

10 − 5.5
IC =
= 0.96mA
4 .7
I B = I E − I C= 0.64mA

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Example 5.6 (DC analysis)

VBE = 0V
I B = 0mA
β = 100

I E = 0mA
I C = 0mA
VC = Vcc = 10V

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Example 5.7 (DC analysis)
forward bias

Active mode check

β = 100

reverse bias

VE = 0.7V
10 − 0.7
= 4.65mA
2k
Assume BJT in active mode :
100
I C = αI E =
× 4.65m = 4.6mA
101
VC = I C × RC − 10V = 4.6m × 1k − 10 = −5.4V
IE =

I B = I E − I C = 0.05mA
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Example 5.8 (DC analysis)

Reverse bias
forward bias
β = 100

Assume BJT in active mode :

5V = 100k × I B + VBE = 100k × I B + 0.7
⇒ I B = 0.043mA
I C = βI B = 4.3mA
VC = 10 − I C RC = 10 − 4.3m × 2k = 1.4V
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Example 5.9 (DC analysis)

β = 30

Assume BJT in active mode :


VE = VEB + VB
RB

l arg e → I B ≈ 0

5 − 0.7
= 4.3mA
1k
I C ≈ I E = 4.3V → VC = 10k × 4.3m − 5V = 38V (impossible)

VE ≈ 0.7V → I E =

I C (max) = 0.5mA → VC = 0V
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Example 5.10 (DC analysis)

Reverse bias
β = 100

forward bias

Thevenin’s equivalent circuit


VBB = I B RBB + VBE + I E RE

VBB = 15V

VBB = I B RBB + VBE + ( βI B + I B ) RE

RBB

⇒ I B = 0.0128mA

50k
= 5V
100k + 50k
= 100k // 50k = 33.3k

Assume BJT in active mode :

⇒ I E = 101× I B = 1.29mA
⇒ I C = 1.28mA
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Example 5.11 (DC analysis)

β = 100

β = 100

15V = ( I C1 + I B 2 ) RC1 + VC1 ≈ I C1 RC1 + VC1
⇒ VC1 ≈ 8.6V

start

VE 2 = VC1 + 0.7V ≈ 9.3V
15 − 9.3
≈ 2.85mA
2k
= αI E 2 ≈ 2.82mA

IE2 =
IC 2

with I B 2 = 0.028mA

Find correct current
by iteration

VC 2 = I C 2 × 2.7 k ≈ 7.62V
I B2 =

IE2
≈ 0.028mA
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Exercise 5.30 (DC analysis)

β = 100
β = 100

IC3
VC 2

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Example 5.12 (DC analysis)

β = 100

β = 100

Q1 and Q2 cannot be conducting at same time.
If Q1 ON than Q2 OFF, and vice versa.

Assume Q1 on and Q2 off :

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BJT’s biasing schemes
1.
2.
3.
4.
5.

self-bias
Base fixed bias
Collector-feedback bias
Two power supply version bias
Constant current bias

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Why we need good biasing scheme?
1.Temperature change ỈCollector biasing current change
2.Device change Ỉ biasing current change
iC

T1 T2 T3

iC1
iC 2
vBE

iC = I S e

VBE
VT

KT 1.38 ×10 − 23 ( o K )
VT =
=
q
1.6 × 10 −19
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VBB − VBE
IE =
RE + 1R+Bβ

1. Self-Bias

Insensitive to T and β
Constrains:
VBB >> VBE
RE >>

Voltage-divider :
RB
1+ β
RR
Q RB = 1 2
R1 + R2
RE >>

Suggestion:
( R1 + R2 ) × 0.1× I E = VCC

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The rule of thumb :
(經驗法則)

VBB = 13 VCC
I C RC = 13 VCC


∴ R1 , R2 small → I B ↑

Trade-off

RB
1+ β

VCE (orVCB ) = 13 VCC
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1. Self-Bias (emitter feedback bias)
VCC

VCC − VBE
IE =
RB
RE + 1+ β

RC
RB
VE
RE

The rule of thumb :

VBB = 13 VCC

I C RC = 13 VCC
VCE (orVCB ) = 13 VCC
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Example 5.13 design the following self bias circuit

VBB − VBE
IE =
RB
RE + 1+ β
The rule of thumb :
VB = 13 12 = 4V
VE = 4 − VBE = 3.3V

given
I E = 1mA
VCC = 12V

β = 100

( R1 + R2 ) × 0.1× I E = VCC

RE =


VE 3.3
=
= 3.3k
I E 1m
1
3

4
⇒ ( R1 + R2 ) × 0.1× 1 = 12 L (a ) RC = 12 =
≈ 4k
αI E 0.99 ×1m
R2
VCC L (b)
VB = 4V ⇒
R1 + R2

R1 = 80k
(a ), (b) ⇒
R2 = 40k

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2. Base fixed bias

VCC
RC
RB

Type 1

IC =

β (VBB − VBE )
RB

Type 3

Type 2

IC =

β (VCC − VBE )
RB

IC =

RB
RB = RB1 // RB 2

VBB
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β (VBB − VBE )

RB 2
=
VCC
RB1 + RB 2
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