Slide điện tử từ trường lecture 11 operational amplifiers
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Lecture 11
Operational Amplifiers
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Topics
•
•
•
•
Ideal op Amplifiers
Ideal OPA circuits analysis
Non-ideal op amplifiers
Non-ideal OPA circuit analysis
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Microelectric Circuit by
Meiling CHEN
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Ideal operational amplifier
Ideal OPA characters
1.
2.
3.
4.
5.
Infinite input impedance
Zero output impedance
Infinite bandwidth
Infinite open-loop gain
Zero common-mode gain (infinite CMRR)
3
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Meiling CHEN
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Vo = uGm R(V+ − V− )
4
Microelectric Circuit by
Meiling CHEN
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5
Microelectric Circuit by
Meiling CHEN
CuuDuongThanCong.com
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Negative feedback
R1
X1
UA741
2
V− = IR + Vo
Vo = A(V+ − V− )
VCC
1
VEE
Vo ↑⇒ V− ↑⇒ Vo ↓= A(V+ − V− ↑ )
Vo ↓⇒ V− ↓⇒ Vo ↑⇒ stable
Positive feedback
X2
UA741
V+ = IR + Vo
VCC
3
VEE
4
Vo = A(V+ − V− )
Vo ↑⇒ V+ ↑⇒ Vo ↑⇒ +Vsat
R2
Vo ↓⇒ V+ ↓⇒ Vo ↓⇒ −Vsat ⇒ unstable
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Meiling CHEN
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Ideal OPA characters
Non-ideal cases
Rin → ∞ ⇒ (i+ = i− = 0)
Rin ≠ ∞
Ro → 0
A → ∞ ⇒ (V+ = V− )
BW → ∞
CMRR → ∞
Ro ≠ 0
A≠∞
BW ≠ ∞
CMRR ≠ ∞
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Meiling CHEN
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Consider finite open-loop gain A ≠ ∞
A≠∞
vo
− R2 / R1
=
vi 1 + (1 + R2 / R1 ) / A
QA≠ ∞
∴v1 ≠v 2
⇒
v− − vi v− − vo
+
= 0L(1)
R1
R2
v0 = A(v+ − v− ) = − Av− L(2)
if A → ∞
vo
R2
=−
vi
R1
8
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Meiling CHEN
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Input and output resistance
Example 2.1
vi
Rin = = R1
ii
vO
Gain ≡
vI
0 − vI 0 − vO
+
=0
R1
R2
⇒ Gain
if
vO
R2
=
=−
vI
R1
R1 = 1M
R2 = 100M
An impractically large value
So we may have the problem of input resistance.
9
Microelectric Circuit by
Meiling CHEN
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Output resistance
Rout
V
= =0
I
R2
vi
Ro → 0
R1
V−
V+
I
0
±
A(V+ −V− )
V
10
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Example 2.2
v X − 0 v X v X − vo
+
+
= 0 L (1)
R2
R3
R4
0 − vI 0 − v X
+
= 0 L (2)
R1
R2
vo
R2
R4 R4
= − (1 +
+ )
vi
R1
R2 R3
Comparing with Example 2.1
Design a amplifier with a gain –100 and an
input resistance of 1M.
Example 2.1:
R1 = 1M
R2 = 100 M
Example 2.2:
vo
R
R R
= − 2 (1 + 4 + 4 )
vi
R1
R2 R3
R1 = 1M , R2 = 1M
R3 = 10.2k , R4 = 1M
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Exercise 2.6
v− − 1 v− − vo
+
= 0 L (1)
1k
10k
v − = 0 L ( 2)
Find
− 1 − vo
− 10k
+
= 0 ⇒ vo =
= −10V
1k 10k
1k
− 10
iL =
= −10mA
1k
0 − (−10)
i2 =
= 1mA
10k
i0 = −11mA
i1 = i2 = 1mA
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Weighted summer
0 − vn 0 − vo
0 − v1 0 − v2
= 0 L (1)
+
+L+
+
R1
R2
Rn
Rf
− vn vo
− v1 − v2
⇒
+
+L+
=
R1
R2
Rn
Rf
⇒ vo =
− Rf
R1
v1 +
− Rf
R2
v2 + L +
− Rf
Rn
vn
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Exercise D2.8
vx
Ra
Ra
v x = −( v1 +
v2 )
R1
R2
Rc
Rc
Rc
vo = −( v3 + v4 + v x )
R3
R4
Rb
Rc
Rc
Rc Ra
Ra
vo = −( v3 + v4 ) + ( v1 +
v2 )
R3
R4
Rb R1
R2
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Non-inverting amplifier
v I − 0 v I − vo
+
=0
R1
R2
Ideal case:
Non-ideal case:
R2
⇒ vo = (1 +
)v I
R1
A≠∞
vi − 0 vi − v o
+
= 0 ....(1)
R1
R2
v o = A ( vi − v − )......... .( 2 )
v o R1 R 2
(1) → v − =
(
)
R 2 R1 + R 2
vo
=
vi
1+
1+
R2
R1
1+
R2
R1
A
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Voltage follower
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Exercise D2.9
Exercise D2.13
v − = v+
v− − 0 v− − vo
+
= 0 L (1)
1k
9k
v− − v1 v− − v2
+
= 0 L ( 2)
2k
3k
1
1
v
v
( 2) ⇒ v − ( + ) = ( 1 + 2 )
2k 3k
2k 3k
1 1
(1) ⇒ vo = 9k ( + )v−
1k 9k
1 1 2k + 3k v1 v2
)( + )
= 9k ( + )(
1k 9k 2k × 3k 2k 3k
v− = v+ = 1V
1 − 0 1 − vo
+
= 0 L (1)
1k
9k
1 1
⇒ vo = ( + )9k = 10V
1k 9k
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Why use difference amplifier ?
CMRR ( Common-Mode Rejection ratio )
CMRR ≡ 20 log
Ad
Acm
vo = Ad vid + Acm vicm
Different-mode input
Common-mode input
V−
DC
V−
≡
V+
DC
DC
DC
v icm
V+
DC
v id
2
V−
vid ≡ v+ − v−
vicm ≡ 12 (v+ + v− )
v id
2
V+
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Meiling CHEN
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Difference Amplifier
Method I:
v− = v+
v− − vi1 v− − vo
+
= 0 L (1)
R1
R2
v+ − vi 2 v+
+
= 0 L ( 2)
R3
R4
v+ − vi1 v+
1
1
R2
+ ) = R2 ( + )v+ − vi1
(1) ⇒ vo = R2 (
R1
R2
R1 R2
R1
( 2) ⇒ v + (
1
1
1
+ )=
vi 2
R3 R4
R3
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Different-mode input
Method I: superposition
R2
vo1 = − vi1
R1
R4
R2
R2
vo 2 =
(1 + )vi 2 =
vi 2 (let
R3 + R4
R1
R1
R3 = R1 , R4 = R2 )
R2
vo = vo1 + vo 2 =
(vi 2 − vi1 ) = Ad (vi 2 − vi1 )
R1
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Common-mode input
R3
1
1
R4
i1 = [vicm −
vicm ] =
vicm
R1
R3 + R4
R3 + R4 R1
R4
vicm − i2 R2
vo =
R3 + R4
R3 R2
R4
−
]vicm
Q i1 = i2 ⇒ vo = [
R3 + R4 R3 + R4 R1
R3 R2
R4
[1 −
]
Acm =
R3 + R4
R4 R1
Q R3 = R1 , R4 = R2 ⇒∴ Acm = 0
CMRR=infinite
if
R3 ≠ R1 , R4 ≠ R2 ⇒ Acm ≠ 0
CMRR=infinite
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Consider the problem of input resistance
vid = i1 R1 + i1 R1 = 2 R1i1
⇒ Rin ( diff ) = 2 R1
R2
vo =
vid
R1
Differential mode input resistance
if
Rin ↑→ R1 ↑ → vo ↓
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Instrumentation Amplifier
Not is differential mode, common
mode input can be pass.
+
vid
−
R4
vo =
vid′
R3
−
vid′
R2
vid′ = (1 + )(vi 2 − vi1 )
R1
+
vo =
Defects:
1. Common mode gain=differential
mode gain. vo → vsat
2. Resistance R1 and R2 have to
match.
Advantages:
Rin → ∞
R4
R2
2. Ad =
(1 + )
R3
R1
R4
R
(1 + 2 )(vi 2 − vi1 )
R3
R1
1.
Big differential gain
vid′ = (1 +
R2
)(vi 2 − vi1 )
R1
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Remove the point x
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DC non-ideal characters
1.
2.
3.
4.
Finite open loop gain ( finite CMRR)
Finite BW
Offset voltage
Input bias and offset current
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