Operational Amplifiers
Junyoung Song
Topics
Ideal OP-AMP
Various Configurations
DC Imperfections
Finite Open-Loop Gain & Bandwidth
Large-signal Operation of OP-AMP
Electronic Circuits
2
Electronic Circuits
3
Terminals
Ideal OP-AMP
OP-AMP with DC Power Supplies
Electronic Circuits
4
Function
Purpose of OP-AMP
▪ Designed to sense the difference between the voltage signals
applied at its two input terminals
▪ A: Differential gain (Open-loop gain)
▪ Common-mode rejection
Electronic Circuits
5
Characteristics of Ideal OP-AMP
Infinite input impedance
Zero output impedance
Zero common-mode gain
▪ Infinite common-mode rejection
Infinite open-loop gain A
▪ OP-AMP is not used alone
Infinite bandwidth
Electronic Circuits
6
Differential & Common-mode Signals
Differential input
▪ 𝒗𝑰𝒅 = 𝒗𝟐 − 𝒗𝟏
Common-mode input signal
▪ 𝒗𝑰𝒄𝒎 =
𝟏
𝟐
𝒗𝟏 + 𝒗𝟐
Each inputs
𝒗𝑰𝒅
𝟐
𝒗𝑰𝒅
𝒗𝑰𝒄𝒎 +
𝟐
▪ 𝒗𝟏 = 𝒗𝑰𝒄𝒎 −
▪ 𝒗𝟐 =
Electronic Circuits
7
Electronic Circuits
8
Inverting Configuration
Circuit
Virtual Ground
Negative feedback
Closed-loop Gain (G)
▪𝑮≡
𝒗𝑶
𝒗𝑰
=? (Next page)
Electronic Circuits
9
With Circuit Model
Virtual Ground
𝟎 − 𝒗𝑰 𝟎 − 𝒗𝑶
+
=𝟎
𝑹𝟏
𝑹𝟐
𝑹𝟐
𝑮≡−
𝑹𝟏
Input Resistance
𝒗𝑰
𝒗𝑰
𝑹𝒊 ≡
=
= 𝑹𝟏
𝒊𝟏 𝒗𝑰 − 𝟎
𝑹𝟏
Electronic Circuits
10
Effect of Finite Open-loop Gain
Model with Finite Open-loop Gain (𝒗𝟏 ≠ 𝒗𝟐 )
𝒗𝒐
𝒗𝑰 − −
𝑨
𝒊𝟏 = 𝒊𝟐 =
𝑹𝟏
𝒗𝟏 − 𝒗𝒊 𝒗𝟏 − 𝒗𝒐
+
=𝟎
𝑹𝟏
𝑹𝟐
𝒗𝒐 = 𝑨 𝒗𝟐 − 𝒗𝟏 = −𝑨𝒗𝟏
𝑹𝟐
𝑮≡−
𝑹𝟏
Electronic Circuits
𝟏
𝑹𝟐
𝟏+
𝑹𝟏
𝟏+
𝑨
Requirement: 𝟏 +
𝑹𝟐
𝑹𝟏
≪𝑨
11
𝑨𝟎 = ∞
Max. 𝑹𝒊𝒏 = 𝟏𝑴
𝑹𝒊𝒏 = 𝟏𝑴
𝑮 = 𝟏𝟎𝟎
Electronic Circuits
12
Example 2.2
𝑨𝟎 = ∞
Max. 𝑹𝒊𝒏 = 𝟏𝑴
𝑹𝒊𝒏 = 𝟏𝑴
𝑮 = 𝟏𝟎𝟎
Electronic Circuits
13
Ex. 2.2 (Solution)
▪ Select resistance (𝑹 ≤ 𝟏𝑴𝛀)
▪ Ideal OP-AMP → 𝒗𝟏 = 𝟎
• Input resistance = 𝑅1 =1𝑀Ω
▪ Nodal Analysis
•
•
0−𝑣𝐼
𝑅1
+
0−𝑣𝑥
𝑅2
=0
𝑣𝑥 −0
𝑣𝑥 −0
𝑣𝑥 −𝑣𝑂
+
+
𝑅4
𝑅2
𝑅3
→𝑣𝑂 = −𝑣𝐼
→𝐴𝑣 =
𝑣𝑂
𝑣𝐼
𝑅2
𝑅1
+
𝑅
𝑅4
𝑅1
=0
1+
𝑅
• 𝐴𝑣 = 100 → 𝑅2 = 1𝑀, 𝑅4 = 1𝑀
• 100 = − 2 +
→ 𝑅3 =
𝑅2
𝑅3
1𝑀
98
1𝑀
𝑅3
= 10.204 Ω
𝑅
= − 𝑅2 1 + 𝑅4 + 𝑅4
1
2
3
Electronic Circuits
14
Weighted Summer
Circuit
𝒗𝟏
𝒗𝟐
𝒗𝒏
, 𝒊𝟐 =
, 𝒊𝒏 =
𝒊𝟏 =
𝑹𝟏
𝑹𝟐
𝑹𝒏
𝒊 = 𝒊𝟏 + 𝒊𝟐 + ⋯ + 𝒊𝒏
𝟎 − 𝒗𝑶
= 𝒊 → 𝒗𝑶 = −𝒊𝑹𝒇
𝑹𝒇
Electronic Circuits
15
Noninverting Configuration (1)
Circuit & Analysis
𝒗𝑰 − 𝟎 𝒗𝑰 − 𝒗𝑶
+
=𝟎
𝑹𝟏
𝑹𝟐
𝒗𝑶
𝑹𝟐
=𝟏+
𝑮≡
𝒗𝑰
𝑹𝟏
Input Resistance
𝒗𝑰 𝒗𝑰
=∞
=
𝑹𝒊 ≡
𝒊𝟏
𝟎
Electronic Circuits
16
Noninverting Configuration (1)
Effect of Finite Open-Loop Gain
R2
R1
𝑹𝟏
𝒗𝟏 = 𝒗𝑶
𝑹𝟏 + 𝑹𝟐
v1
vId
v2
AvId
vO
𝒗𝑶 = 𝑨𝒗𝑰𝒅 = 𝑨(𝒗𝟐 − 𝒗𝟏 )
𝑹𝟐
𝟏+𝑹
𝒗𝑶
𝟏
=
𝑮≡
𝑹
𝒗𝑰
𝟏+ 𝟐
𝑹𝟏
𝟏+
𝑨
vi
Requirement: 𝟏
Electronic Circuits
𝑹𝟐
+
𝑹𝟏
≪𝑨
17
Voltage Follower
Unity-gain Buffer 𝑮 = 𝟏
Electronic Circuits
18
Electronic Circuits
19
Difference Amplifier - CMRR
Common-Mode Rejection Ratio (CMRR)
▪ 𝒗𝑶 = 𝑨𝒅 𝒗𝑰𝒅 + 𝑨𝒄𝒎 𝒗𝑰𝒄𝒎
▪ 𝑨𝒅 : Differential gain
▪ 𝑨𝒄𝒎 : Common-mode gain (Ideally zero)
▪ 𝑪𝑴𝑹𝑹 = 𝟐𝟎 𝐥𝐨𝐠
𝑨𝒅
𝑨𝒄𝒎
Electronic Circuits
20
Difference Amplifier (1/3)
Circuit & Analysis
▪ With superposition analysis
• For differential gain
▪ With 𝒗𝑰𝟏
• 𝑣𝐼2 = 0
𝑅
• 𝑣𝑂1 = − 𝑅2 𝑣𝐼1
▪ With 𝒗𝑰𝟐
1
• 𝑣𝐼1 = 0
• 𝑣𝑂2 =
𝑅4
𝑅3 +𝑅4
1+
𝑅2
𝑅1
▪ Gain should be matched
•
Gain through positive and
negative feedbacks should
be matched
•
𝑅4
𝑅3 +𝑅4
𝑅4
𝑅3 +𝑅4
▪ So…
• 𝒗𝑶 =
Electronic Circuits
1+
𝑅2
𝑅1
𝑅2
1 +𝑅2
=𝑅
𝑹𝟐
𝑹𝟏
𝑅
= 𝑅2
1
𝑅
𝑣𝐼2
𝑅
➔ 𝑅4 = 𝑅2 (Condition)
3
1
𝒗𝑰𝟐 − 𝒗𝑰𝟏 =
𝑹𝟐
𝒗
𝑹𝟏 𝑰𝒅
21
Difference Amplifier (2/3)
Circuit & Analysis
▪ For common-mode gain
▪ 𝒊𝟏 =
▪ 𝒊𝟐 =
𝒗𝑰𝒄𝒎 −
𝑹𝟒
𝒗
𝑹𝟑 +𝑹𝟒 𝑰𝒄𝒎
𝑹𝟏
𝑹𝟒
𝒗
𝑹𝟑 +𝑹𝟒 𝑰𝒄𝒎
𝑹𝟐
−𝒗𝑶
=
𝟏 𝑹𝟑 ∙𝒗𝑰𝒄𝒎
𝑹𝟏 𝑹𝟑 +𝑹𝟒
• 𝑣𝑂 =
𝑅4
𝑣
𝑅3 +𝑅4 𝐼𝑐𝑚
− 𝑖2 𝑅2
• 𝑣𝑂 =
𝑅4
𝑣
𝑅3 +𝑅4 𝐼𝑐𝑚
−
▪ 𝒊𝟏 = 𝒊𝟐
→𝑣𝑂 =
𝑅4
𝑅3 +𝑅4
1−
𝑅2 𝑅3 ∙𝑣𝐼𝑐𝑚
𝑅1 𝑅3 +𝑅4
𝑅2 𝑅3
𝑅1 𝑅4
▪ With previous condition…
• 𝑨𝒄𝒎 ≡
Electronic Circuits
𝒗𝑶
𝒗𝑰𝒄𝒎
=𝟎
𝑣𝐼𝑐𝑚
𝑅4
𝑅3
=
𝑅2
𝑅1
22
Difference Amplifier (3/3)
Circuit & Analysis
▪ Differential input resistance
▪ 𝑹𝒊𝒅 ≡
𝒗𝑰𝒅
𝒊𝑰
▪ With virtual short circuit
• 𝑣𝐼𝑑 = 𝑅1 𝑖𝐼 + 0 + 𝑅1 𝑖𝐼
▪ 𝑹𝒊𝒅 = 𝟐𝑹𝟏
Electronic Circuits
23
Instrumentation Amplifier (1/2)
Purpose
▪ Getting higher input resistance
Difference Amplifier
Gain stage
Electronic Circuits
24
Instrumentation Amplifier (2/2)
Issues
▪ CMRR degradation
• Caused by the 1st stage
• Mismatching between A1 and A2
▪ Matching between R1
• Will cause different differential gain in the 1st stage
➔Hard to make it
➔Disconnect node X from ground!
Electronic Circuits
25