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LAB REPORT



EXPERIMENT 9

DELTA MODUALATION







DELTA MODULATION




Purpose:



The objectives of this laboratory are:
1. To demonstrate delta-modulation
2. To convert an analog signal into a 3 bit digital

Equipment List

1 . PC with Matlab and Simulink



DELTA MODULATION

Most real world signals of practical interest, such as speech, radar signals, sonar signals,
and various communication signals such as audio and video signals are analog. To process an
analog signal by digital means, it is vital to convert it into digital form. That is to convert it to a
sequence of numbers having finite precision. This procedure is called analog-to-digital (A/D)
conversion, and the corresponding devices are called A/D converters. However, modern demands
for precise, fast transmission and processing of such signals coupled with the recent advances in
VLSI technology has resulted in the necessity of cost-effective and highly accurate A/D
converters. Sigma-delta modulation has recently become the choice for high resolution A/D
conversion. The sigma-delta modulator, which forms a significant part of an A/D converter, uses
the concept of oversampling the signal and shaping the noise out of the band of interest. The
benefits of such an oversampled noise-shaping converter include inherent linearity and high
tolerance to circuit imperfection.

The block diagram of a general sigma-delta modulator is shown below. The sigma-delta
modulator consists of a discrete time integrator, a quantizer and a D/A converter in the feedback
path. The discrete time integrator (accumulator) is modeled as an adder and a unity delayor in the
feed-forward path, with unity feedback. The role of the feedback in the sigma-delta modulator

structure is to force the average value of the quantized signal to track the input. By doing that, any
difference between them is accumulated in the discrete time integrator and eventually the system
corrects itself.


A qualitative description of a conventional first-order S-D modulator is given below. The
quantizer (comparator) produces +1s for positive inputs and -1s for negative inputs. The output
from the quantizer is feedback and subtracted from the input. This generates an error signal u(k),
which is the difference between the input and the output signals of the modulator. In this case the
feedback forces the output signal to be equal to the input signal. When the output from the
quantizer is +1s , y(k) is greater than the input, and the error u(k) is negative. At this time
negative values will be accumulated in the accumulator, and will force after a few clocks cycles
the quantizer to produce -1s and therefore the error u(k) will become positive. Also the error u(k)
will be reduced because positive errors will cancel out negative errors when averaged over a
period of time. Now with -1s at the output of the quantizer y(k), the error u(k) will be positive and
positive values will be accumulated in the accumulator, and will force the quantizer after a few
clock cycles to produce +1s. This operation, of producing +1s and -1s at the output of the
modulator and averaging them over a period of time is related to the DC input value of the
modulator.
The figure below shows how the output y(k) from the modulator responds to a sinusoid
applied to its input x(k).










The frequency response of the modulator is plotted below. Applying a 32k FFT (Fast
Fourier Transform) using a Hanning window has produced the output. It is obvious that the
Sigma-Delta modulator shapes the quantization noise away from the signal band leaving the
actual signal virtually unaffected.




figure 9 (a) Delta modulation




figure 9 (b) Delta modulation – block parameters of DPCM encode







figure 9 A – Delta Modulation


The input signal is given by


figure 9 (c) Delta modulation – input signal









figure 9 (d) Delta modulation quantization recovered signal







figure 9 (e) Delta modulation – input signal & output


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